The present invention generally relates to the production of composite substrates based on silicon, such as silicon on insulator (SOI) type substrates.
It is known to fabricate a substrate by transferring a thin semiconductor layer onto a base substrate acting as a massive support that initially has a non-zero quantity of interstitial oxygen. For example, such a method is used to produce support substrates having high resistivity. To achieve this end, the interstitial oxygen present in the base substrate is precipitated to reduce the quantity of residual oxygen. i.e. the oxygen remaining after precipitation). Studies in this area have shown that a high resistivity substrate may be obtained by achieving a residual oxygen content Oi which is as low as possible. Such substrates may be used in the field of microwave applications. In particular, integrating high quality factor, passive components implies limiting high frequency losses by eddy currents, which can be achieved by endowing the base substrate with high resistivity of typically more than 100 ohms (Ω).
A further justification for using this type of method is linked to the fabrication of substrates that are capable of withstanding severe heat treatments without developing slip lines. Such heat treatments are, for example, integrated into substrate finishing treatment phases.
It is known (see, for example, International patent application WO-A-01 15215) that by using a rapid thermal annealing (RTA) step in a reducing atmosphere before implementing a chemical-mechanical polishing step, it is possible to improve the quality of a thin layer more effectively than with simple polishing or simple annealing. Such operation also avoids to a great extent the undesirable effects of simple chemical-mechanical polishing. RTA type annealing in a reducing atmosphere actually commences the smoothing of the surface of the thin layer. The polishing time necessary to obtain a satisfactory roughness value is thus reduced or even avoided, thus increasing production capacity and also limiting the negative effects of polishing, in particular as regards uniformity in the thickness of the thin layer.
However, heat treatments, and in particular rapid thermal annealing (RTA) treatments, include rapid temperature rises and very high temperatures (typically 1200° C. in less than one minute). Such finishing treatments are necessary for the production of an SOI substrate wafer but also tend to cause undesirable slip lines in the treated wafer. The slip lines, which are fracture planes that offset the crystalline structure of the wafer, affect the electrical performance of the components which are subsequently produced. Further, slip lines weaken the substrate and can lead to rupture of the structure during subsequent heat treatment(s) that are used to produce the components.
U.S. Pat. No. 6,544,656 describes a method of fabricating a high resistivity substrate and discloses using a series of specific heat treatments which are referred to herein as “HR HT” (for “High-Resistivity Heat Treatments”). These heat treatments can reduce the concentration of interstitial oxygen in the base substrate. U.S. Pat. No. 6,544,656 briefly recites that the method could limit the development of slip lines during subsequent component production. The oxygen content of a substrate may be measured in “new ppma”, wherein ppma is an acronym for “parts per million atoms”, and this measurement method is known to one skilled in the art.
A detailed study into the phenomena of the occurrence of slip lines in connection with the degree of precipitation of interstitial oxygen was conducted, but not in connection with obtaining a high resistivity base substrate. In contrast, U.S. Pat. No. 6,544,656 is directed to fabricating a high resistivity substrate, wherein the main goal is to control the final quantity of interstitial oxygen present in the base substrate, and slip line reduction phenomena was simply noted in certain cases.